DSP with dual-mac processor and dual-mac coprocessor
US6606700B1 · kind B1 · utility
13Cited by
2References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 26, 2000 |
| Grant date | Aug 12, 2003 |
| Priority date | — |
| Expiry date | Feb 26, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/7817
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention is a digital signal processor architecture that is designed to speed up frequently-used signal processing computations, such as FIR filters, correlations, FFTs, and DFTs. The architecture uses a coupled dual-MAC architecture (MAC1), (MAC2) and attaches a dual-MAC coprocessor (MAC3), (MAC4) onto it in a unique way to achieve a significant increase in processing capability.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.