Thin film transistor having pixel electrode connected to a laminate structure
US6608353B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 12, 2002 |
| Grant date | Aug 19, 2003 |
| Priority date | — |
| Expiry date | Jul 12, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/13091
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layer is less than 1500 å, e.g., between 100 and 750 å. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting of aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.