CMOS assisted output stage
US6608526B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 17, 2002 |
| Grant date | Aug 19, 2003 |
| Priority date | — |
| Expiry date | Apr 17, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/30129
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An output stage for an operational amplifier includes a dynamically activated CMOS drive circuit that is arranged to improve the drive characteristics of the operational amplifier. The output stage includes bipolar transistors that are arranged to clamp the signal swing at an intermediary node in the operational amplifier. The bipolar transistors activate respective portions of the CMOS drive circuit based on the signal drive at the intermediary node. The CMOS driver circuit includes a p-type field effect transistor that sources additional current into the output signal when active, and an n-type field effect transistor that sinks additional current from the output terminal when active. The output stage may include additional circuitry to ensure that parasitic capacitances associated with the gates of the p-type field effect transistor and the n-type field effect transistors are discharged at appropriate times such that power consumption is reduced and high-speed operation is enhanced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.