Stacking system and method
US6608763B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 15, 2000 |
| Grant date | Aug 19, 2003 |
| Priority date | — |
| Expiry date | May 24, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10689
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A system and method for selectively stacking and interconnecting individual integrated circuit devices to create a high density integrated circuit module. Connections between stack elements are made through carrier structures that provide inter-element connections that substantially follow an axis that is substantially perpendicular to the vertical axis of the stack. The carrier structure provides connection between elements through conductive paths disposed to provide connection between the foot of an upper IC element and the upper shoulder of the lower IC element. This leaves open to air flow most of the vertical transit section of the lower lead for cooling while creating an air gap between elements that encourages cooling airflow between the elements of the stack. A method for creating stacked integrated circuit modules according to the invention is provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.