Thin film transistor array panels for a liquid crystal display and a method for manufacturing the same
US6611309B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 24, 2001 |
| Grant date | Aug 26, 2003 |
| Priority date | — |
| Expiry date | Dec 10, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/441
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention relates to the formation, on a substrate having a display area and a peripheral area, of a gate wire including a plurality of gate lines and gate electrodes in a display area and gate pads in the peripheral area, and of a common wire, including a common signal line and a plurality of common electrodes in the display area. A gate insulating layer, a semiconductor layer, an ohmic contact layer and a conductor layer are sequentially deposited, and the conductor layer and the ohmic contact layer are patterned to form a data wire including a plurality of data lines, a source electrode and a drain electrode of the display area, and data pads of the peripheral area, and an ohmic contact layer pattern thereunder. A passivation layer is deposited and a positive photoresist layer is coated thereon. The photoresist layer is exposed to light through one or more masks having different transmittances between the display area and the peripheral area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.