System and method for frame accurate splicing of compressed bitstreams
US6611624B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 15, 1998 |
| Grant date | Aug 26, 2003 |
| Priority date | — |
| Expiry date | Oct 27, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N21/242
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A system for performing frame accurate bitstream splicing includes a first pre-buffer, a second pre-buffer, a seamless splicer, and a post-buffer. The system also includes a time stamp extractor, a time stamp adjuster, and a time stamp replacer for timing correction. The first and second pre-buffers are input buffers to the seamless splicer, and the post-buffer is coupled to the output of the seamless splicer. The seamless splicer receives the two streams via the first and second pre-buffers and produces a single spliced bitstream at its output in response to the cue tone signal. The seamless splicer provides the first bitstream, then re-encodes portions of the first and second bit streams proximate the splicing points (both the exit point and the entry point), and then switches to providing a second bitstream. The seamless splicer also performs rate conversion on the second stream as necessary to ensure decoder buffer compliance for the spliced bitstream. The present invention also includes a method for performing bitstream splicing comprising the steps of: determining a splicing point switching between a first bitstream and a second bitstream, determining whether the second bitst…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.