Path filtering for latch-based systems
US6611949B2 · kind B2 · utility
1Cited by
10References
16Claims
0Family size
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Key dates
| Filing date | Nov 8, 2001 |
| Grant date | Aug 26, 2003 |
| Priority date | — |
| Expiry date | Nov 8, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/3312
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and a system for static timing analysis of a latch-based circuit. A netlist data structure represents the latch-based circuit. The method statically analyzes the netlist data structure and produces timing information for signal paths within the latch-based circuit. The signal paths are filtered using path termination information, which specifies where paths end. The path termination information distinguishes a first signal path that terminates at a latch from a second signal path that flows through that same latch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.