Semiconductor device and method of manufacturing the same
US6614075B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 10, 2001 |
| Grant date | Sep 2, 2003 |
| Priority date | — |
| Expiry date | May 10, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/393
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includesa source region 4, a channel region 8, a drain region 5 and a gate electrode which is patterned so that its side wall is tapered to be more narrow toward the top. A drift region 22 is formed between the channel region 8 and drain region 5 so as to be shallow below the gate electrode 7A (first N− layer 22A) and deep in the vicinity of the drain region 5 (second N− layer 22B).This configuration contributes to boosting the withstand voltage and reducing the “on” resistance of the semiconductor device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.