Ultra-fast voltage drive
US6614273B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 30, 2001 |
| Grant date | Sep 2, 2003 |
| Priority date | — |
| Expiry date | Jan 30, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/04126
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An ultra-fast drive circuit (40) providing a rail-to-rail drive voltage at an output node (N1). A pair of bipolar output transistors (Q3, Q4) are selectively driven via a FET drive circuit (42), and by a control circuit (44) to achieve a rail-to-rail output voltage (Vcc−Vee) that is very fast. The drive FETs comprise three serially connected FETs (M5, M6, M7) whereby the middle FET (M6) is the control FET effecting the control of the output transistors (Q3, Q4). The other two FETs (M5, M7) are always in the on state and complete either the pull-up or pull-down of the voltage at the output node (N1), depending on the state of the middle FET (M6). The control FETs (44) provide two output control signals (46, 48) to the output transistors (Q3, Q4), with the control line (48) controlling the state of the middle switching FET (M6).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.