Integrated data transceiver circuit for use with a serial bus and bus interface
US6615301B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 8, 1999 |
| Grant date | Sep 2, 2003 |
| Priority date | — |
| Expiry date | Mar 8, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0272
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An integrated bus interface circuit for a computer system for communicating between a serial bus and a function device. The bus interface circuit includes a voltage regulator, a bidirectional serial data transceiver, a serial interface engine, and a device controller. The voltage regulator supplies a first power supply voltage (e.g., 3.3 volts) in a first voltage range by using a second power supply voltage (e.g., 5 volts) in a second voltage range. The transceiver converts a plurality of bus-specific data signals (e.g., 3.3V modulated format) into a plurality of interface-specific data signals (e.g., 5V modulated format), and conversely, by using the first and second power supply voltages. The serial interface engine performs an interface between the interface-specific signals and a plurality of device-specific signals (e.g., 5V binary format). The device controller controls the function device in response to the device-specific signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.