Method and system for controlling a power on sequence in response to monitoring respective components of a computer system with multiple CPU sockets to determine proper functionality
US6615360B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 25, 2000 |
| Grant date | Sep 2, 2003 |
| Priority date | — |
| Expiry date | Jan 25, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of controlling the power-on of a computer system by providing a plurality of monitor lines interconnected with respective components of the computer system, monitoring the lines using a control circuit in response to a power-on reset signal, and executing a system power-on sequence in response to a determination by the control circuit that the components of the computer system are functioning properly. If the computer system has a plurality of CPU slots, the control circuit determines if a CPUs or terminator cartridges is plugged into the CPU slots, and determines that a properly matched CPU has been installed into the system, and that multiple CPUs contain compatible power supply requirements. Finally, the control circuit can determine that a power regulator is functioning properly.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.