Fabrication method of wiring substrate for mounting semiconductor element and semiconductor device
US6617236B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Feb 7, 2002 |
| Grant date | Sep 9, 2003 |
| Priority date | — |
| Expiry date | Feb 7, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K3/243
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
By adopting an electrolytic plating method in forming the bump, the drawbacks of the conventional electrolytic plating method should be avoided. For example, the necessity of adopting a lead wiring for each wiring or the like should be eliminated. On the surface of a metal base, a resist film (first resist film) having a negative pattern for forming a wiring film and a resist film (second resist film) having a negative pattern for forming the bump or the pad is formed. By using these films as masks, electrolytic plating of a bump material film is conducted to form the bump. Subsequently, after only the second film is removed. By using the first resist film as a mask, electrolytic plating is then conducted to form a wiring film.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.