MOS type reference voltage generator having improved startup capabilities
US6617835B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 6, 2002 |
| Grant date | Sep 9, 2003 |
| Priority date | — |
| Expiry date | May 6, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S323/901
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A reference voltage generator having high-speed starting at a low power source voltage and with high stability and high precision, without substantially increasing the circuit area. NMOS transistors 10 and 12 form a current mirror circuit, with the same drain current I. PMOS transistors 14 and 16 form a current mirror circuit, and drain current I is fed to the current mirror circuit. Resistor 18 provides an offset between the source voltages of PMOS transistors 14 and 16. Start-up capacitor 22 is connected between gate/drain of NMOS transistor 10, which is connected as a diode, and the terminal of power source voltage VDD on the positive electrode side. And/or a start-up capacitor 24 is connected between gate/drain of diode-connected PMOS transistor 16 and the terminal of power source voltage VSS on the negative electrode side. In another embodiment PMOS transistors 25, 26 form a current mirror with the same drain current I. NMOS transistors 21, 23 form a current mirror and the drain current I is fed to the current mirror circuit. Resistor 28 provides an offset to the terminal of power source VSS. Start-up capacitor 32 is connected between the gate/drain of PMOS transistor 25 and V…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.