VCO circuit with wide output frequency range and PLL circuit with the VCO circuit
US6617933B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 21, 2001 |
| Grant date | Sep 9, 2003 |
| Priority date | — |
| Expiry date | Jun 21, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/093
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A voltage-controlled oscillating circuit according to the present invention includes: a bias voltage generating circuit outputting a bias voltage according to a control voltage; and a ring oscillator circuit receiving supply of the bias voltage to operate. The bias voltage generating circuit generates the bias voltage using a feedback circuit formed by an operational amplifier receiving supply of a power source voltage to operate. Therefore, an influence of a high frequency component overlapped on the power source voltage, that is an influence of noise, is suppressed, thereby enabling stable generation of an output clock having a small variation in phase.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.