Digital frequency divider
US6618462B1 · kind B1 · utility
24Cited by
3References
56Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 15, 2002 |
| Grant date | Sep 9, 2003 |
| Priority date | — |
| Expiry date | Feb 15, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/68
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method is presented for dividing a reference clock frequency by any real number. The invention allows for a real number divisor that could have any desired degree of precision. Additionally, the invention seeks to minimize hardware complexity in realizing such a reference-clock frequency divider. In one particular embodiment of the invention, a system and method is presented, wherein the real number divisor is a real number having a repeating decimal (i.e., the real number may be represented by a fraction).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.