Universal memory bus and card
US6618784B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 29, 2000 |
| Grant date | Sep 9, 2003 |
| Priority date | — |
| Expiry date | Mar 29, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4239
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A universal memory bus coupled between a system's CPU and the system memory is composed of four channels; a primary channel, an identification channel, a programming channel and an expansion channel. The primary channel communicates operating system data necessary to boot the system. The identification channel communicates signals describing the device composition of the system memory. The programming channel communicates programming signals to all of the programmable memory devices within the system memory and thus allows complete programmability of those devices. The expansion channel provides data and programming access to a memory device subsequently added to the system memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.