Burst suspend and resume with computer memory
US6618790B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 29, 2000 |
| Grant date | Sep 9, 2003 |
| Priority date | — |
| Expiry date | Jan 13, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A burst transfer operation with a memory device can be suspended and resumed without having to provide the current memory address when it is resumed. A chip enable signal to the memory device can be deasserted to initiate the suspend operation and place the memory device in a low power standby mode. When the chip enable signal is reasserted, the memory device can be reactivated and the burst transfer can continue where it stopped, without any setup commands. The current address counter and other bus transfer parameters can be saved within the memory device during the suspend operation. When the suspend operation is terminated by reasserting the chip enable signal, the memory device can resume the transfer using the saved parameters.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.