Stepped structure for a multi-rank, stacked polymer memory device and method of making same
US6624457B2 · kind B2 · utility
10Cited by
8References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 20, 2001 |
| Grant date | Sep 23, 2003 |
| Priority date | — |
| Expiry date | Jul 20, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K19/00
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
The present invention relates to a ferroelectric polymer storage device including at least two stacked ferroelectric polymer memory structures that are arrayed next to at least two respective stacked topologies that are a pre-fabricated silicon substrate cavity that includes interlayer dielectric layers and via structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.