Input/output circuit with user programmable functions
US6624656B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 15, 1999 |
| Grant date | Sep 23, 2003 |
| Priority date | — |
| Expiry date | Oct 15, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17744
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The I/O circuit of the present invention provides optimal flexibility and performance using a number of different structures and methods. The present invention provides a signal follower circuit for an input pad. In one embodiment, the output buffer is capable of injecting a constant onto a pad during reconfiguration of a configurable system logic circuit. The present invention also provides a circuit for generating a programmable data propagation delay, thereby guaranteeing zero hold time for an arbitrary input register. Zero hold time is accomplished by allowing the user to optimally characterize clock delay to a given input/output circuit. The present invention also provides fast switching between input pads, thereby minimizing data propagation delay between the input pads. Additionally, the present invention reduces time spent in production product test by facilitating the testing of multiple routes with one test configuration. A circuit expanding the number of data input channels available to system routing is provided. Lastly, a plurality of identical input/output block tiles (IOBTs) is disclosed, thereby enabling each I/O circuit to provide the same signals regardless of the…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.