Level detection by voltage addition/subtraction
US6624685B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 2, 2001 |
| Grant date | Sep 23, 2003 |
| Priority date | — |
| Expiry date | Mar 20, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit is designed with a first transistor (661) having a current path coupled between a supply terminal (32) and a first output terminal (665). A second transistor has a current path coupled between the first output terminal and a reference terminal. The current path of the second transistor current path has substantially the same width and length as the first transistor current path. A first comparator circuit (679, 685) has first (668) and second (23) input terminals and a second output terminal (681). The first input terminal is coupled to the first output terminal. The first comparator circuit produces a control signal in response to a voltage between the first and second input terminals. A generator circuit (80) receives the control signal and produces an output voltage at the supply terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.