Filtering variable offset amplifer
US6624688B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 7, 2002 |
| Grant date | Sep 23, 2003 |
| Priority date | — |
| Expiry date | Jan 7, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H2210/023
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A current summing FIR filter can be implemented with multiple differential input stages and variable tail currents. The variable tail currents can be used to appropriately weight the present and previous digital input signals. The weighted outputs of the differential transistor pairs can be summed to provide a filtered output signal. The tail currents can be advantageously varied with variable current sources or by adjustment of the relative widths of the differential transistor pairs. In other embodiments, additional differential pairs can be added to adjust for systematic offset voltages caused by process-induced variations in the structure of circuit devices or to induce a desired offset.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.