Method and circuit for improving lock-time performance for a phase-locked loop
US6624707B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 2, 2001 |
| Grant date | Sep 23, 2003 |
| Priority date | — |
| Expiry date | May 5, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/093
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A gain control for a phase locked loop circuit is provided. In the phase-locked loop circuit, a voltage controlled oscillator generates a reference signal responsive to the level of a tuning voltage. A phase detector generates the tuning voltage update, which is indicative of a phase relationship between the reference signal and an input signal. A feedback circuit detects the tuning voltage and generates an adjustment signal in response. The adjustment signal is then used to adjust the loop gain at any specific tuning voltage. In a specific example, the adjustment signal is used to adjust the current gain of the phase detector in a manner that is complementary to the non-linear voltage gain of the voltage-controlled oscillator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.