Design features optimized for tiled flat-panel displays
US6624870B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 13, 2002 |
| Grant date | Sep 23, 2003 |
| Priority date | — |
| Expiry date | Feb 13, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/13336
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The present invention features designs of pixels and designs of control features for seals on AMLCD tiles optimized for tiling AMLCD flat panel displays (FPDs) which have visually imperceptible seams. The FPD structure has an image view plane which is continuous and remote from the pixel apertures or image source plane on the inside of the tiles. The image is formed on the view plane by a distributed ultra low magnification flies-eye optical system (a screen) that is integrated with the tiles, effectively excluding and obscuring an image of the seams. The innovations described herein minimize the defects on the perimeter pixels by effectively damming the waviness of the front of the seal near the perimeter pixels on the tiles. Dark space required for the seal between the interior tile edges and active regions of the pixels is decreased, as is the space allocated for wiring thereby increasing the feasible aperture ratios near the mosaic edges and all apertures. The tile designs make effective use of the area of an entire manufacturing panel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.