Fast exception processing
US6625693B2 · kind B2 · utility
5Cited by
11References
33Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 4, 1999 |
| Grant date | Sep 23, 2003 |
| Priority date | — |
| Expiry date | May 4, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3861
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Fast exception processing is disclosed. In one embodiment, a system includes a splice cache, an exception logic, and an instrumentation mechanism. The splice cache contains one or more lightweight handlers. The exception logic is coupled to the splice cache and determines whether the corresponding lightweight handler for an exception is located in the splice cache. The instrumentation mechanism is coupled to the splice cache. The instrumentation mechanism inserts the lightweight handler into an execution stream.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.