Memory controller and method for managing a logical/physical address control table
US6625713B2 · kind B2 · utility
13Cited by
4References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 19, 2002 |
| Grant date | Sep 23, 2003 |
| Priority date | — |
| Expiry date | Mar 19, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B2220/61
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory controller for reading data stored in a nonvolatile memory that includes a number of erasable blocks containing a number of pages. A logical/physical address control table stored in a logical/physical address control table block of the nonvolatile memory is searched, read, and manipulated in the nonvolatile memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.