Apparatus and method for programming a set of programmable logic devices in parallel
US6625796B1 · kind B1 · utility
13Cited by
4References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Aug 30, 2000 |
| Grant date | Sep 23, 2003 |
| Priority date | — |
| Expiry date | Oct 20, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/34
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of configuring a set of programmable logic devices includes the step of partitioning a programming file into a set of programmable logic device configurations. A set of programmable logic devices are subsequently configured, in parallel, in accordance with the set of programmable logic device configurations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.