Apparatus and method for efficiently obtaining and utilizing register usage information during software binary translation
US6625807B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 10, 1999 |
| Grant date | Sep 23, 2003 |
| Priority date | — |
| Expiry date | Aug 10, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/52
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Apparatus and method are described for register optimization during code translation and utilizes a technique that removes the time overhead for analyzing register usage, and eliminates fixed restraints on the compiler register usage. The present invention for register optimization utilizes a compiler to produce a bit vector for each program unit (i.e., subroutine, function, and/or procedure). Each bit in the bit vector represents a particular caller-saved register. A bit is set if the compiler uses the corresponding register within that program unit. During the translation, the translator examines the bit vector to very quickly determine which registers are free, and therefore can be used during register optimization without having to save and restore the register values.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.