Chip package enabling increased input/output density
US6627978B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 28, 2001 |
| Grant date | Sep 30, 2003 |
| Priority date | — |
| Expiry date | Sep 28, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/73204
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A device and method for increasing input/output from a die by making electrically conductive microvias connecting the integrated circuit with a backside of the die. The backside electrically conductive microvias connect an integrated circuit in the die to pads on the backside of the die. A superstrate is situated on top of the die and connects to the microvias using controlled collapse chip connections (C4) with a thermal interface material (TIM) surrounding the electrical connections. A superstrate lead system electrically connects the backside pads to wirebonds that connect with either the substrate or directly to the motherboard. Heat dissipates from the die via the TIM to the superstrate to a heat sink situated on top of the superstate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.