Substrate for semiconductor device and semiconductor device fabrication using the same
US6627986B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2001 |
| Grant date | Sep 30, 2003 |
| Priority date | — |
| Expiry date | Apr 5, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A substrate for a semiconductor device is provided, which prevents a semiconductor element or IC chip mounted thereon from being broken or damaged electrostatically in a fabrication process sequence or a semiconductor device. The substrate comprises (a) a dielectric core material with an upper surface and a lower surface; the core having a mounting area on the upper surface, a semiconductor element being mounted in the mounting area; the core having a contact area, (b) inner terminals formed on the core material; the inner terminals being used for electrical connection to the semiconductor element mounted on the core material; (c) external terminals formed on the core material; the external terminals being used for electrical connection to an external circuit provided outside the substrate; and (d) inner wiring lines formed on the core material; the inner wiring lines connecting electrically and mechanically the inner terminals with the respective external terminals; part of the inner wiring lines being located in the contact area of the core in such a way as to be able to contact an external conductor provided outside the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.