Method and apparatus for binary encoding logic circuits
US6628215B2 · kind B2 · utility
17Cited by
7References
125Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 29, 2001 |
| Grant date | Sep 30, 2003 |
| Priority date | — |
| Expiry date | Jan 29, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for state assignment of a logic circuit comprises receiving internal state representations for the logic circuit, determining binary code for the internal state representations by successively dividing the states into disjoint sets of ever decreasing size Each disjoint set of a pair is assigned a one bit at each division step. The division can continue for all bits to be encoded, or the division can be halted and exact encoding used for the encoding of the final number of bits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.