Method for operating a semiconductor memory device having a plurality of operating modes for controlling an internal circuit
US6629224B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 1, 2000 |
| Grant date | Sep 30, 2003 |
| Priority date | — |
| Expiry date | May 1, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/40611
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Signals supplied to predetermined terminals are accepted as commands at a plurality of times, the number of operating modes is sequentially narrowed down based on the command each time and an internal circuit is controlled according to the narrowed operating modes. Since the information necessary for determining an operating mode is accepted at a plurality of times, the number of terminals necessary for inputting commands can be reduced. In particular, in case of inputting commands at a dedicated terminal, its input pads, input circuits, or the like are no longer be required so that the chip size can be reduced. The reduction is accomplished by reducing the number of terminals, which gives limits to the package size. The command controlling circuit with a plurality of accepting circuits is comprised. Each of the accepting circuits respectively accepts signals, supplied at a plurality of times, each time. In other words, in accordance with the timing of the signal supplement, a different accepting circuit is respectively operated and the internal circuit is controlled. Accordingly, a command controlling circuit may be readily designed even in the semiconductor memory device having a…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.