Reduced pin-count 10Base-T MAC to transceiver interface
US6631138B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 24, 1999 |
| Grant date | Oct 7, 2003 |
| Priority date | — |
| Expiry date | Jun 24, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/0697
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Provided is a 10Base-T MAC to PHY interface requiring only two wires (pins) per port, with two additional global wires: a clock wire (pin), and a synchronization wire (pin). This reduction in the number of pins associated with each port is achieved by time-division multiplexing wherein each time-division multiplexed wire combines a plurality of definitions from the conventional seven-wire interface. As a result, each port has its own pair of associated time-division multiplexed wires (pins) and the addition of each port simply requires two additional wires. According to a preferred embodiment of the present invention, information normally transferred on nine wires in a conventional seven-wire interface at 10 MHz is time-division multiplexed onto two wires (corresponding to two pins) that transfer data at 40 MHz, four times the speed of conventional interfaces. Importantly, this multiplexing is done on a port by port basis. Therefore, the number of pins required for a MAC to transceiver interface is two times the number of ports plus two instead of nine times the number of ports, and the addition of each additional port requires only two more wires (pins).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.