Method and apparatus for identifying switching race conditions in a circuit design
US6631506B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 2, 2002 |
| Grant date | Oct 7, 2003 |
| Priority date | — |
| Expiry date | Apr 2, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/33
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention is directed to a method for evaluating a circuit design to identify potential race conditions including the steps of identifying switching elements in a design, storing control node and switched node pair information for each of the switching elements, identifying stacks of the switching elements; storing information about the stacks of switching elements; identifying parallel connected ones of the switching elements; identifying parallel stacks; and calculating a combined switching current for the parallel switching elements and stacks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.