Data processing system having plurality of processors and executing series of processings in prescribed order
US6633975B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 10, 1999 |
| Grant date | Oct 14, 2003 |
| Priority date | — |
| Expiry date | Nov 10, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/8053
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing system has the following construction in order to achieve high speed data processing with reduced memory capacity. There are provided a memory to store a plurality of pieces of sequentially input data to be processed, a plurality of processors to execute a series of processings, e.g., Log conversion, MTF correction, gamma correction and binarization in this order to the data to be processed stored in the memory in the order of input, and a state control portion to determine which processing is stagnant by monitoring the progress of a processing by each of said plurality of processors and prohibit a processor executing a processing succeeding to a processing determined as being stagnant from accessing the memory. Processings by the plurality of processors are executed asynchronously and the plurality of processors share the memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.