Despreading circuit
US6636557B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 7, 2001 |
| Grant date | Oct 21, 2003 |
| Priority date | — |
| Expiry date | Nov 2, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B2201/70709
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A despreading circuit which can reduce a circuit scale and power consumption is described. The circuit includes an A/D converter which converts a CDMA modulated analog signal to a digital signal of N bits, and a searcher which defects a synchronization phase from high-order small bits of the N bits and outputs synchronozation phase information to a control circuit. The control circuit transmits a signal for allowing despreading to be performed to a sliding correlator based on the phase information. The sliding correlator despreads the N bit digital signal outputted by the A/D converter and outputs the resulting correlation output as a despreading signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.