Output driver impedance calibration circuit
US6636821B2 · kind B2 · utility
19Cited by
13References
14Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 3, 2001 |
| Grant date | Oct 21, 2003 |
| Priority date | — |
| Expiry date | Dec 24, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0005
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An output driver impedance calibration circuit which is used to make I/O (input/output) off chip driver characteristics, for a plurality of output driver circuits, alike on the same chip. The output impedance of an input/output driver circuit is calibrated by providing an external target impedance reference (it could be a multiple of the actual target output impedance), multiple devices in the output stage of the I/O driver circuit, a circuit to determine the value of the actual output impedance as compared with its target output impedance and a determination of when to stop the calibration process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.