Flexible method for satisfying complex system error handling requirements via error promotion/demotion
US6636991B1 · kind B1 · utility
7Cited by
13References
19Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 23, 1999 |
| Grant date | Oct 21, 2003 |
| Priority date | — |
| Expiry date | Dec 23, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/0781
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A signaling mechanism associated with errors in a processor is promoted or demoted based on a set of stored values.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.