Decoder for error correcting block codes
US6637002B1 · kind B1 · utility
104Cited by
12References
60Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 21, 1998 |
| Grant date | Oct 21, 2003 |
| Priority date | — |
| Expiry date | Oct 21, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/6561
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A decoder for decoding block error correction codes is described. The decoder includes a first search circuit to find roots of an error location polynomial corresponding to an error location and a second search circuit to find roots of an error location polynomial corresponding to an error location. A multiplexer is fed by the first search circuit and the second search circuit to produce an error location from the error location polynomial.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.