Method of manufacturing gate driver with level shift circuit
US6638808B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 28, 2003 |
| Grant date | Oct 28, 2003 |
| Priority date | — |
| Expiry date | Jan 28, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/063
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a gate driver configured to drive a power semiconductor device includes providing a substrate having an upper surface; forming a conductive region on a portion of the upper surface of the substrate; forming a dielectric layer overlying the conductive region; forming a first conductive layer provided over the conductive region and at least a portion of the dielectric layer; patterning the first conductive layer to provide the first conductive layer with a given resistance value; forming a second conductive layer over the dielectric layer and electrically coupled to the conductive region and first conductive layer; and patterning the second conductive layer to provide an input node that is coupled to a first portion of the resistor and an output node that is coupled to a second portion of the resistor. The input node is configured to receive a control signal from a control signal generator and the output node is configured to receive the control signal from the input node via the resistor. The conductive region, the first conductive layer, and the at least portion of the dielectric layer together form a first capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.