Semiconductor device having a chip size package including a passive element
US6639299B2 · kind B2 · utility
Assignees
Inventor
Key dates
| Filing date | Apr 8, 2002 |
| Grant date | Oct 28, 2003 |
| Priority date | — |
| Expiry date | Apr 8, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/957
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a semiconductor substrate on which a circuit element forming region and a plurality of connection pads are formed, a first columnar electrode which is formed on a first connection pad so as to be electrically connected to the first connection pad, a first conductive layer which is formed on a second connection pad so as to be electrically connected to the second connection pad, an encapsulating film which is formed at least around the first columnar electrode, on the semiconductor substrate and on the first conductive layer, and a second conductive layer which is formed on the encapsulating film so as to face the first conductive layer. A passive element is formed from the first and second conductive layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.