Electrostatic discharge protection circuit for protecting input and output buffer
US6639772B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 7, 2002 |
| Grant date | Oct 28, 2003 |
| Priority date | — |
| Expiry date | Apr 13, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/815
Abstract
An electrostatic discharge (ESD) protection circuit for protecting input and output buffers. The ESD protection circuit is driven by a first voltage source and a second voltage source and coupled to a bonding pad. The ESD protection circuit has a first resistor, a first PMOS transistor, a first NMOS transistor, a first diode series, a second PMOS transistor, a second resistor, a third PMOS transistor, a second NMOS transistor, a second diode series and a third NMOS transistor. The electrical devices combine to form different types of ESD protection circuits, each capable of protecting the input buffer or output buffer against the damaging effects of an electrostatic discharge.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.