Patent · US Expired

Clock signal generator employing a DDS circuit

US6642754B1 · kind B1 · utility

17Cited by

5References

14Claims

0Family size

Assignee

Siemens Aktiengesellschaft · DE

Inventors

Dieter Dobramysl · Munich, DE
Ludwig Hofmann · Pfaffenhofen an der Ilm, DE
Frank Lillie · Hersbruck, DE

Key dates

Filing date	Jan 22, 2002
Grant date	Nov 4, 2003
Priority date	—
Expiry date	Jan 22, 2022

Classification

Technology area (CPC G)Physics
CPC primaryG06F1/025
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A clock signal generator having a DDS circuit which adds up a frequency word with a particular frequency and generates an output pulse when an overflow occurs. To reduce jitter, a parameter value corresponding to the ideal overflow time of the DDS circuit is determined and an output pulse generating circuit determines, in dependence on the parameter value and using a further, higher frequency, a corrected time for the output pulse and outputs the output pulse at this corrected time.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.