Replica compensated heterogeneous DACs and methods
US6642867B1 · kind B1 · utility
9Cited by
2References
39Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 3, 2002 |
| Grant date | Nov 4, 2003 |
| Priority date | — |
| Expiry date | Jul 3, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/785
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Digital to analog converters having a hybrid two-stage structure. The first stage is a differential segmented current DAC controlled by the MSBs (most significant bits) of input data. The second stage is a resistor string DAC controlled by the LSBs (least significant bits) of the input data to interpolate between the differential outputs of the first stage. The resistor string is directly connected to the current DAC without the need of buffer amplifiers. Instead, a replica circuit is used to prevent the second-stage resistor string from loading the first stage current DAC. Compensation techniques are described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.