Piecewise linear calibration method and circuit to correct transfer function errors of digital to analog converters
US6642869B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 1, 2002 |
| Grant date | Nov 4, 2003 |
| Priority date | — |
| Expiry date | May 1, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/76
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A calibrated digital-to-analog converter (DAC) (15′) has a main DAC (17) having a digital input and an analog output. An on-chip memory (21) stores measured INL values of the main DAC at a few selected input codes, and digital interpolation (50,17) is used to approximate INL error values at all input codes (14 . . . 14VI). To cancel the INL errors of the main DAC, outputs of this digital interpolation are sent to a calibration DAC (19), which has an analog output subtracted from the analog output of the main DAC. This subtraction can also be done in the digital domain, removing the need for a calibration-DAC when a main DAC with higher bit-count is designed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.