Multiprocessor system utilizing multiple links to improve point to point bandwidth
US6643764B1 · kind B1 · utility
25Cited by
4References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 20, 2000 |
| Grant date | Nov 4, 2003 |
| Priority date | — |
| Expiry date | Nov 19, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L45/742
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A multiprocessor computer system comprises a plurality of processing element nodes and an interconnect network interconnecting the plurality of processing element nodes. An interface circuit is associated with each one of the plurality of processing element nodes. The interface circuit has a lookup table having n-number of routing entries for a given destination node. Each one of the n-number of routing entries associated with a different class of traffic. The network traffic is routed according to the class.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.