Self-aligned fabrication method for a semiconductor device
US6645819B2 · kind B2 · utility
8Cited by
5References
89Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 19, 2001 |
| Grant date | Nov 11, 2003 |
| Priority date | — |
| Expiry date | Oct 19, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D10/021
Abstract
One embodiment of the present invention provides a method of fabricating a semiconductor device including the steps of forming a first semiconductor layer; forming a second semiconductor layer over the first semiconductor layer; forming a mask over a first portion the second semiconductor layer; removing a second portion of the second semiconductor layer not covered by the mask; forming a first electrical connector on the first semiconductor layer; and forming a second electrical connector on the first portion of the second semiconductor layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.