Semiconductor device with tapered gate and insulating film
US6646287B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 17, 2000 |
| Grant date | Nov 11, 2003 |
| Priority date | — |
| Expiry date | Nov 17, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6721
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
In a semiconductor device, typically an active matrix display device, the structure of TFTs arranged in the respective circuits are made suitable in accordance with the function of the circuit, and along with improving the operating characteristics and the reliability of the semiconductor device, the manufacturing cost is reduced and the yield is increased by reducing the number of process steps. A semiconductor device has a semiconductor layer, an insulating film formed contacting the semiconductor layer, and a gate electrode having a tapered portion on the insulating film, in the semiconductor device, the semiconductor layer has a channel forming region, a first impurity region for forming a source region or a drain region and containing a single conductivity type impurity element, and a second impurity region for forming an LDD region contacting the channel forming region, a portion of the second impurity region is formed overlapping a gate electrode, and the concentration of the single conductivity type impurity element contained in the second impurity region becomes larger with distance from the channel forming region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.