Method and apparatus for increasing capture range and jitter tolerance in phase detection circuits
US6646478B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 29, 2002 |
| Grant date | Nov 11, 2003 |
| Priority date | — |
| Expiry date | Aug 29, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D13/004
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A phase detection system allows the capture range, lock range and jitter tolerance to be extended beyond ±360°. The capture range for the phase detection system may be extended in programmable amounts up to several thousand clock cycles or can be set to any desired maximum capture range in steps of approximately 360°. The phase detection system circuit utilizes a coarse phase detector and a fine phase detector. The phase detection system uses the digital cycle slip counter phase detector to provide a wide phase capture and lock range for a large jitter tolerance. The phase detection system combines this detector with a fine phase measurement from a PFD (phase and frequency detector) for very accurate phase control and low output jitter. The PFD operates in the approximately ±540° range and provides overlap in response with a coarse phase detector using a digital cycle counter approach. The PFD allows the digital counter, used for coarse cycle slip tracking, to precondition the PFD so that the coarse and fine detectors work together with no dead-band and no conflict in responses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.