Integrated circuit having an FM demodulator and method therefor
US6646500B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 2, 2002 |
| Grant date | Nov 11, 2003 |
| Priority date | — |
| Expiry date | Apr 13, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D3/006
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A digital FM demodulator employs a baseband phase lock loop (BBPLL), which is particularly effective for long range reception, for combining and demodulating a pair of signals represented by the mathematical expression A(t)ej&thgr;(t) to result in an approximation of d&thgr;/dt. This approximation is then subjected to an inverse of the linear approximation of the frequency response of the BBPLL that produces a very accurate &thgr;. This is conveniently achieved with a IIR filter whose transfer function happens to be the same as the inverse of the linear approximation of the frequency response of the BBPLL. The derivative is then taken of &thgr; to produce a very accurate d&thgr;/dt, the desired result for the output of an FM demodulator. To aid operation of the BBPLL, the incoming digital intermediate frequency is upsampled by a combination of sample and hold and FIR filtering prior to being processed by the BBPLL.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.