Digital-to-analog converter circuit incorporating hybrid sigma-delta modulator circuit
US6646581B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 2, 2002 |
| Grant date | Nov 11, 2003 |
| Priority date | — |
| Expiry date | Jul 2, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M7/3037
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An exemplary PLL circuit includes a VCO responsive to a plurality of sub-varactor control signals. A digital loop filter for the PLL digitally generates a varactor control word, which is digitally expanded into a plurality of digital values, each of which is conveyed to a corresponding one of a plurality of DACs. A multiplexer is configured to respectively convey the DAC output signals to a group of sub-varactor control signals according to the varactor control word, and to drive remaining sub-varactor control signals to either the full-scale high value or the full-scale low value of the DAC outputs. Each of the DACs preferably includes a hybrid first order/second order sigma-delta modulator, and in certain embodiments, a NRZ-to-RZ coder circuit, and a linear filter circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.